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  1 switching charger for 1-cell and 2-cell li-ion batteries isl9220, isl9220a the isl9220, isl9220a is a cost-effective and versatile battery charger for 1-cell and 2-cell li-ion and li-polymer based portable applications. the device features synchronou s pwm technology, maximizing power efficiency, thus minimizi ng charge time and heat. the 1.2mhz switching frequency allows use of small external inductors and capacitors. a simple charge current programming method is provided. external resistors program the fast charge an d end-of-charge currents. the two status outputs can be used to drive leds, or can be connected to host processor. a programmable charge timer provides the ability to detect defective batteries, and provides a secondary method of detecting charge termination. a thermistor interface is provided for battery presence detection, and for temperature qualif ied charging conditions. additional features include preconditioning of an over-discharged battery, automatic recharge, and thermally enhanced qfn package. applications ? pdas and smart phones ? mp3 and portable media players ? handheld gps devices ? digital still cameras ? industrial handheld scanners features ? highly integrated battery charger ic ? charges 1- and 2-cell li-i on or li-polymer batteries ? up to 2a charge current ? synchronous buck topology with integrated power fets ? 1.2mhz switching frequency ? 0.5% charge voltage accuracy ? programmable input current limit with one external resistor ? thermistor interface for battery detection and temperature qualified charging ? two status outputs ? programmable charge safety timer ? short-circuit and thermal protection ? small 4mmx4mm tqfn package ? -40c to +85c operating temperature range related literature ? tb363 ?guidelines for handling and processing moisture sensitive surface mount devices (smds)? ? tb379 ?thermal characterization of packaged semiconductor devices? ? tb389 ?pcb land pattern design and surface mount guidelines for qfn packages? ? an1589 , ?isl9220irtzeval1z (1-cell), ISL9220AIRTZEVAL1Z (2-cell) evaluation board? pin configuration isl9220, isl9220a (20 ld tqfn) top view 15 14 13 12 11 20 19 18 17 16 6 7 8 9 10 1 2 3 4 5 stat2 en agnd iset1 iset2 pgnd sw sw vhi vin stat1 time rth vbias pgnd vbat isns cisp cisn vin pad (agnd) caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2010-2012. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. february 16, 2012 fn6936.3
isl9220, isl9220a 2 fn6936.3 february 16, 2012 pin descriptions pin symbol description 1 stat2 open-drain indication pin. in conjunct ion with stat1 this pin provides a unique indication for each charging state of the cycle. this pin is capable to sink 10ma minimum current to drive an led. 2en ic enable input. drive this pin to logic lo to enable the charger. drive this pin to logic hi to disable the charger. do not leave this pin floating. 3 agnd analog ground. 4 iset1 charge current programing pin. connect a resistor be tween this pin and the gnd pin to set the charge current. 5 iset2 end-of-charge current programing pin. connect a resistor between this pin and the gnd pin to set the end-of-charge current. 6 vbat battery connection pin. connect this pin to the battery. a 10f or larger x5r ceramic capacitor is recommended for decoupling and stability purposes. 7 isns output current sense pin. connect a cu rrent sense resistor from this pin to v bat . no decoupling capacitor is needed at this pin. 8 cisp input current sense positive connection pin. co nnector a sense resistor from this pin the cisn. 9 cisn input current sense negative connection pin. connector a sense resistor from this pin the cisp. 10, 11 vin input supply voltage. connect a 4.7f ceramic capacitor from vin to pgnd. 12 vhi high-side nmos fet gate drive supply pin. connect the an ode of a schottky diode to vbias pin and the cathode to vhi pin. connect a 0.1f capacitor from vhi pin to sw pin. see ?typical application diagrams? on page 6. 13, 14 sw switch node and inductor connection pin. 15, 16 pgnd power ground. 17 vbias internal 5v regulator output. connect a 0.1f ~ 4.7f ce ramic capacitor from this pin to agnd. a typical 1f ceramic capacitor is recommended. 18 rth input for an external ntc thermistor for battery temperature monitoring. 19 time the time pin sets the oscillation peri od by connecting a timing capacitor betwee n this pin and gnd. the oscillator also provides a time reference for the charger. the timer function can be disabled by connecting the time pin to gnd. if the timer is disabled, there will be no time out function for any operation mode including trickle charge and fast charge modes. 20 stat1 open-drain indication pin. in conjunction with stat2 this pin provides a unique indication for each charging state of th e cycle. this pin is capable to sink 10ma minimum current to drive an led. epad exposed pad. connect to gnd electrically. thermally, connec t as much as possible copper to this pad either on the component layer or other layers through ther mal vias to enhance the thermal performance. ordering information part number (notes 1, 2, 3) part marking number of cells temp. range (c) package tape & reel (pb-free) pkg. dwg. # isl9220irtz-t 92 20irtz 1 -40 to +85 20 ld 4x4 tqfn l20.4x4e isl9220irtz-t7a 92 20irtz 1 -40 to +85 20 ld 4x4 tqfn l20.4x4e isl9220airtz-t 922 0airtz 2 -40 to +85 20 ld 4x4 tqfn l20.4x4e isl9220airtz-t7a 922 0airtz 2 -40 to +85 20 ld 4x4 tqfn l20.4x4e isl9220irtzeval1z evaluation board ISL9220AIRTZEVAL1Z evaluation board notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb- free products are msl classified at pb-free peak reflow temperat ures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see device information page for isl9220, isl9220a .for more information on msl please see techbrief tb363 .
isl9220, isl9220a 3 fn6936.3 february 16, 2012 absolute maximum rating s thermal information vin, cisp, cisn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 18v sw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.7v to 18v vhi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 24v vbat, isns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 10v iset1, iset2, rth, vbias, stat1, stat2, en . . . . . . . . . . . . . -0.3v to 5.5v time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 2.75v input current (vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.0a output current (sw) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.2a esd rating human body model (tested per jesd22-a114f) . . . . . . . . . . . . . . 2500v machine model (tested per eia/jesd22-a115-a) . . . . . . . . . . . . . . 175v charged device model (tested per jes22-c101d). . . . . . . . . . . . . 1500v latch-up (tested per jesd-78b; class 2 (+85c), level a) . . . . . . . . . . . . . 100ma thermal resistance (typical) ja (c/w) jc (c/w) 4x4 qfn package (notes 4, 5) . . . . . . . . 40 4.3 maximum junction temperature (plastic package) . . . . . . . . . . . .+150c maximum storage temperature range . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/ pbfree/pb-freereflow.asp recommended operating conditions ambient temperature range . . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c supply voltage, vin isl9220 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5v to 14v isl9220a. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9v to 14v programmable charge current . . . . . . . . . . . . . . . . . . . . . . . . 200ma to 2a programmable trickle current . . . . . . . . . . . . . . . . . . . . . . 20ma to 200ma caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379. 5. jc , ?case temperature? location is at the center of the exposed metal pad on the package underside. electrical specifications typical specifications are measured at the following conditions: t a = +25c; for isl9220, v in =5v; for isl9220a, v in = 12v. parameter symbol test conditions min typ max units power-on reset rising v in threshold v por_r 3.4 3.6 3.8 v falling v in threshold v por_f 2.2 2.4 2.6 v v in - v bat offset voltage rising offset threshold v os_r isl9220 - 95 150 mv isl9220a - 170 300 mv falling offset threshold v os_f isl9220 10 65 - mv isl9220a 20 130 - mv supply current vin pin supply current i cc(vin) pgood = true, en = l (note 6) 10 15 ma pgood = true, en = h (note 6) v in = 5v to 12v - -0.5ma battery discharge current (total of currents flowing into vbat, isns, sw pins) i dis vin < v por or en = h 2v < v bat < 11v -25 a overvoltage protection input ovp rising threshold v in_ovpr 14.5 15.0 15.5 v input ovp falling threshold v in_ovpf 14.0 14.5 15.0 v output current fast charge current accuracy i chg rsns = 0.039 ? riset1 = 49.9k ? (nominal i out = 1000ma) -10 - 10 % charge termination current accuracy i min rsns = 0.039 ? riset2 = 300k ? (nominal i min = 100ma) -35 - 35 % charge termination detection deglitch time -12- ms
isl9220, isl9220a 4 fn6936.3 february 16, 2012 level 1 pre-charge current range (linear mode) i pchg1 v bat < v pchg1 25 50 90 ma level 2 pre-charge current accuracy i pchg2 rsns = 0.039 ? riset2 = 300k ? (nominal i pchg = 140ma) - 20 - % level 1 pre-charge threshold voltage v pchg1 isl9220 2.42 2.5 2.56 v isl9220a 4.8 5.0 5.3 v level 2 pre-charge threshold voltage v pchg2 isl9220 2.9 3.0 3.1 v isl9220a 5.75 6.0 6.25 v recharge threshold recharge voltage threshold v rechg isl9220 3.85 4.0 4.1 v isl9220a 7.75 8.0 8.25 v temperature monitoring high battery temperature threshold v tmin specified as % of v bias 30 35 40 % low battery temperature threshold v tmax specified as % of v bias 70 75 80 % battery removal threshold v rmv specified as % of v bias 90 95 - % thermistor disable threshold v t_dis - 250 - mv temperature threshold hysteresis v t,hys - 180 - mv temperature detection deglitch time -12- ms thermal protection thermal shutdown threshold t fd - 140 - c thermal hysteresis t hys -30- c vbias output output voltage v bias 5.3 < v in < 15v, i vbias = 5ma 4.70 5.0 5.25 v output current i bias 5.3 < v in < 15v - - 5 ma oscillator oscillation period t osc c time = 15nf - 3.0 - ms switching charger ac characteristics switching frequency f osc 1.02 1.2 1.38 mhz maximum duty cycle d max -96- % minimum duty cycle d min -0- % cycle-by-cycle current limit i lim -3.0- a switching charger dc characteristics high-side mosfet on-resistance r ds(on) , hs1 - 112 - m combined high side on-resistance (note 7) r ds(on) , hs2 measured between v in and sw pins - 224 450 m low-side mosfet on-resistance r ds(on) , l - 72 180 m high-side path reverse leakage current i rev v in = 0v, vsw = 15v - 1.0 5.0 a charger output voltage v chg isl9220, i out = 100ma, t a = +25c 4.179 4.2 4.221 v isl9220a, i out = 100ma, t a = +25c 8.358 8.4 8.442 v isl9220, i out = 100ma 4.158 4.2 4.242 v isl9220a, i out = 100ma 8.316 8.4 8.484 v electrical specifications typical specifications are measured at the following conditions: t a = +25c; for isl9220, v in =5v; for isl9220a, v in = 12v. (continued) parameter symbol test conditions min typ max units
isl9220, isl9220a 5 fn6936.3 february 16, 2012 input current sense amplifier input bias current at csip and csin, pin (charger enabled) i isip_on en = l - 100 200 a input current limit threshold i in_lim csip-csin 88 100 112 mv output current sense amplifier input bias current at isns pin, (charger enabled) i isns_on en = l - 100 200 a input bias current at isns pin, (charger disabled) i isns_off en = h --1a input bias current at vbat pin, (charger enabled) i vbat_on en = l - 75 100 a input bias current at vbat pin, (charger disabled) i vbat_off en = h --1a logic input and outputs en pin logic high 1.3 - - v en pin logic low --0.4v stat1, stat2 sink current when on pin voltage = 0.4v 10 - - ma stat1, stat2 leakage current when off pin voltage = 4.2v - - 1 a notes: 6. pgood is defined as when v in and v bat meet all these conditions: v in > vpor, v in - v bat > vos, v in < v in(ovp) . 7. limits should be considered typical and are not production tested. electrical specifications typical specifications are measured at the following conditions: t a = +25c; for isl9220, v in =5v; for isl9220a, v in = 12v. (continued) parameter symbol test conditions min typ max units
isl9220, isl9220a 6 fn6936.3 february 16, 2012 typical application diagrams 1-cell application 2-cell application 1-cell li+ battery sw stat1 agnd 10h 10f 4.7f iset1 iset2 pgnd time isl9220 vhi rth en stat2 vin vbias vbias vbat isns 40m 1f 0.1f cisn cisp 10nf 22 ac adapter 4.5v to 14v 50m 2-cell li+ battery sw stat1 agnd 10h 10f 4.7f iset1 iset2 pgnd time isl9220a vhi rth en stat2 vin vbias vbias vbat isns 40m 0.1f 0.1f 50m cisn cisp 10nf 22 ac adapter 9v to 14v
isl9220, isl9220a 7 fn6936.3 february 16, 2012 block diagram vin control logic and charge state machine 1-cell or 2-cell li+ battery vref and bias generation pwm controller sw pgnd en stat1 rth enable disable isns agnd 4.7f 10h 10f stat2 time iset2 vbat rsns v_battery comparators chg curr prog iset1 vhi ref1v vbias output current sense amp vbias timeout notherm suspend vbias batpres timerst timerst ovfault suspend timeout batpres ovfault eocqual pgood gofast eocqual vref vref prechg chgen vbat chgen prechg cells cells 1f 0.1f gofast input current sense amp cisn cisp r ics gate drive 1 0 n f 2 2 tempok rth comparators chg timer notherm tempok 6 0 0 k
isl9220, isl9220a 8 fn6936.3 february 16, 2012 typical operating conditions figure 1. pwm waveform in cc mode figure 2. pwm waveform in trickle mode figure 3. efficiency vs load 1-cell (v in = 5v, l = 10h) figure 4. efficiency vs load 2-cell (v in = 12v, l = 10h ch4 = inductor current (500ma/div) ch1 = sw(5v/div) ch4 = inductor cu rrent (500ma/div) ch1 = sw(5v/div) 95 90 85 80 75 70 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 efficiency (%) charge current (a) v bat = 3.6v v bat = 4v v bat = 4v v bat = 3v 95 90 85 80 75 70 efficiency (%) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 charge current (a) v bat = 8.2v v bat = 7v v bat = 6v
isl9220, isl9220a 9 fn6936.3 february 16, 2012 theory of operation the isl9220, isl9220a is an integrated charger optimized for charging 1-cell and 2-cell li-ion or li-polymer batteries. it charges a battery with constant current (cc) and constant voltage (cv) profile. the typical charge prof ile is illustrated in figure 5. por and power-good the isl9220, isl9220a resets itself when v in undergoes transition from below v por to above v por threshold. the isl9220, isl9220a has an internal pgood signal. charging is prohibited if pgood statement is not true. see note 6 in the ?electrical specifications? table for the definition of pgood. valid charge temperatures an external ntc thermistor can be used to provide temperature- qualified charging. the v bias supply is used as reference for the internal comparators. thus, it is important that the v bias supply also be used to bias the extern al voltage divider comprised of one or more fixed resistors an d the thermistor. this scheme allows the use of a wide variety of thermistors. the rth comparator block monitors the rt h pin voltage to determine if the battery temperature is within safe charging limits. the isl9220, isl9220a uses two comparators (cp2 and cp3) to form a window comparator, as shown in figure 6. when the ntc pin voltage is ?out of the window,? determined by the v tmin and v tmax , the isl9220, isl9220a stops charging and indicate a suspend condition. when the temper ature returns to the set range, the charger resumes charging. the two mosfets, q1 and q2, produce hysteresis for both upper and lower thresholds. the temperature window is shown in figure 7 for a 0c to +50c typical application using an in dustry standard type 103at thermistor. the temperature qualification fu nction can be disabled by connecting the rth pin to ground. battery detection the presence or absence of the external thermistor is used to detect a battery. when v rth is greater than v rth,pres , i.e. when the rth pin is not connected to ground, battery detection is provided by the rth comparator block, as shown in figu re 6. with no battery connected, the rth pin is pulled to v bias by r u , and thus v rth will exceed the v rth,nobat threshold. the internal battery presence signal is deglitched with a 12ms deglitcher, to avoid false indication of battery insertion or removal due to contact bounce or other noises. battery precharge when the charger is first enable d and no fault conditions are detected, if the battery connecting to the charger is deeply discharged, the charger will charge the battery in a reduced current for the battery to recover. if the battery voltage is less than the level 1 pre-charge voltage (v pchg1 ), the charger operates in ldo mode, with an output current fixed at 50ma typical. in this mode, th e output voltage can go to 0v. this provides the ability to recover a battery that has entered a safety-circuit undervoltage fault mode. prechg cc cv off battery voltage charge current typical charge profile eoc detection figure 5. typical charge profile + - + - rth agnd vbias r2 r3 r4 r5 q1 q2 cp2 cp3 under temp over temp to rth pin v tmin v tmax r t + - r1 battery removal cp1 v rmv vbias r u figure 6. thermistor internal circuit v tmin (4.0v) 0v under temp over temp rth pin voltage v tmin- (3.5v) v tmax (1.5v) v tmax+ (2.0v) figure 7. threshold voltages for 0c to +50c window (v bias = 5.0v)
isl9220, isl9220a 10 fn6936.3 february 16, 2012 if battery voltage is between the level 1 pre-charge voltage (v pchg1 ) and level 2 pre-charge voltage (v pchg2 ), the charger operates in trickle mode, and uses the precharge current limit. this precharge current is programmed by the resistor between the iset2 pin and ground. note that this resistor also programs the end-of-charge taper current threshold. where r iset2 is in k and r sns is in . when the battery voltage exceeds the level 2 pre-charge voltage threshold (v pchg2 ), fast charging will commence. if this threshold is not reached within the precharge timer period, a time-out-fault condition is asserted, and the charger is disabled. charge safety timer an internal oscillator establishes a timing reference. the oscillation period is programmable with an external capacitor at the time pin, c time , as shown in the ?typical application diagrams? on page 6. the oscillator charges the timing capacitor to 1.5v and then discharges it to 0.5v in one period, both with 10a current. the period t osc is calculated in equation 3: where c time is in f . a 1nf capacitor provides 0.2ms oscillation period. the allowable range of c time value is 100pf to 1f, providing a programmable charge safety-timeout range of about 1.4 minutes to almost 10 days. total charge time, excluding any ti me required for precharge, is limited to a length of timeout. this can be calculated as equation 4: total charge time for battery prec harge is limited to a length of 1/8 timeout. this can be calculated as equation 5: the time pin can be grounded to disable the safety timer functions if not needed. fast charge the fast charge current is prog rammed by the resistor between the iset1 pin and ground, and by the value of the r sns resistor (see equation 6). where r iset1 is in k and r sns is in . for best accuracy, select a r sns value that provides between 40mv to 80mv differential voltage across r sns at the desired maximum peak current (dc plus ripple). charge termination charge current is continuously mo nitored. when the current falls below the taper current threshold, charging will stop, and batful is asserted to indicate a successf ul charge completion. this taper current threshold is programmed by a single external resistor between iset2 and ground as calculated in equation 7. where r iset2 is in k and rsns is in . a secondary charge termination method is provided via the safety timer. the timeout period of this timer is programmable via a single external capacitor between the time pin and ground. to disable the charge safety timer, short the time pin to ground. charge current sensing charge current is sensed with an external current sense resistor. a low-inductance, precision resistor should be used for accurate charge current. input current sensing input current is sensed with an external sense resistor. a low- inductance, precision resistor should be used for accurate input current limit. the isl9220, isl9220a limits th e battery charge current when the input current limit threshold is exceeded. this allows the most efficient use of ac-adapter power without overloading the adapter output. an internal amplifier compares the voltage between csip and csin, and reduces the output current when this differential voltage exceeds the threshold voltage. the effective input current limit threshold is thus set by the value of the r ics resistor as calculated by equation 8. where r ics is in . a low pass filter is suggested to eliminate the switching noise, as shown in the ?typical application diagrams? on page 6. status outputs i pchg1 50ma = (eq. 1) i pchg2 1638 r iset2 r sns -------------------------------------- - ma () = (eq. 2) t osc 0.2 10 6 c time sec () = (eq. 3) timeout 2 22 t osc sec () = (eq. 4) timeout pchg () 2 19 t osc sec () = (eq. 5) i chg 1946 r iset1 r sns -------------------------------------- - ma () = (eq. 6) table 1. stat1 and stat2 true table stat1 stat2 charging condition l l precharge, or fast charge in progress l h charge complete hlfault hhsuspend i eoc 1170 r iset2 r sns -------------------------------------- - ma () = (eq. 7) i in lim () 0.1 r ics ----------- - a () = (eq. 8)
isl9220, isl9220a 11 fn6936.3 february 16, 2012 stat1 and stat2 are configured to indicate various charging conditions as given in table 1. a fault status is triggered under one of these conditions: 1. v bat > vout_ovp threshold 2. timeout occurs before the eoc current has been reached to exit the fault mode, the input power has to be recycled, or the en pin is toggled to hi and back to lo. applications information power-on reset (por) the isl9220, isl9220a resets itself as the input voltage rises above the por rising threshold. th e internal oscillator starts to oscillate, the internal timer is reset, and the charger begins to charge the battery. the stat1/2 pins will indicate the operating condition according to table 1. trickle charge if the battery voltage is below the trickle charge threshold, the isl9220, isl9220a delivers a small current to charge the battery until the battery voltage reaches the fast charge threshold value. there are two trickle charge thresholds. the first threshold, v pchg1 , is to pre-charge a deeply discharged battery or short circuit. the second threshold, v pchg2 is for batteries discharged to a voltage range from 2.5v to 3v. when v bat is below v pchg1, the isl9220, isl9220a operates as a linear regulator, providing a 50ma constant current to output. when v bat reaches v pchg2, the isl9220, isl9220a starts to op erate as a switching charger. the trickle charge current is programmable by riset2. charge cycle a charge cycle consists of thre e charge modes: trickle mode, constant current (cc) mode, and constant voltage (cv) mode. the charge cycle always starts with the trickle mode until the battery voltage stays above v min (3.0v typical). if the battery voltage stays below v min , the charger stays in the trickle mode. the charger operates in cc mode after the battery voltage is above v min . as the battery-pack terminal voltage rises to the final charge voltage, the cv mode op eration begins. since the battery terminal voltage is regulated at the constant output voltage in the cv mode, the charge current be gins to drop. after the charge current drops below the end-of-charge level, which is programmed by riset2. the isl9220, isl9220a indicates the end-of-charge (eoc) with stat1 and stat2 and terminates the charge. the following events initiate a new charge cycle: ?por ? a new battery being inserted (detected by rth pin) ? recovery from an battery over-temperature fault ?the en pin is toggled from hi-to-lo recharge after a charge cycle completes at a timeout event, charging is prohibited until the recharge condition (v bat < vrechg) is met, then the charging restarts wi th the timer reset to zero. inductor and output capacitor selection to achieve better steady state and transient response, isl9220, isl9220a typically uses a 10h indu ctor. the peak-to-peak inductor current ripple can be expressed in equation 9: in equation 9, usually the typical values can be used but to have a more conservative estimation, the inductance should consider the value with worst case tolerance; and for switching frequency f s , the minimum f s from the ?electrical specifications? table on page 3 can be used. a worst case for charge current ripple is when battery voltage is half of the input voltage. to select the inductor, its saturati on current rating should be at least higher than the sum of the maximum output current and half of the delta calculated fr om equation 9. another more conservative approach is to select the inductor with the current rating higher than th e peak current limit. another consideration is the inductor dc resistance since it directly affects the efficiency of the converter. ideally, the inductor with the lower dc resist ance should be considered to achieve higher efficiency. inductor specifications could be different from different manufacturers so please check with each manufacturer if additional information is needed. for the output capacitor, a ceramic capacitor can be used because of the low esr values, which helps to minimize the output voltage ripple. a typical value of 10f/10v ceramic capacitor should be enough for mo st of the applications and the capacitor should be x5r or x7r. board layout recommendations the isl9220, isl9220a is a high frequency switching charger and hence the pcb layout is a very important design practice to ensure a satisfactory performance. the power loop is composed of the output inductor l, the output capacitor c out , the sw pin and the pgnd pin. it is important to make the power loop as small as possible and the connecting traces among them should be di rect, short and wide; the same practice should be applied to the connection of the vin pin, the input capacitor c in and pgnd. the switching node of the converter, the sw pin, and the traces connected to this node are very noisy, so keep the voltage feedback trace and other noise sensitive traces away from these noisy traces. the input capacitor should be placed as close as possible to the vin pin. the ground of the input and output capacitors should be connected as close as possible as well. in addition, a solid ground plane is helpful for a good emi performance. the isl9220, isl9220a employ s a thermal enhanced qfn package with an exposed pad. in order to maximize the current capability, it is very importan t that the exposed pad under the package is properly soldered to the board and is connected to other layers through thermal vias. more thermal vias and more i v bat 1 v bat v in ------------ - ? ?? ?? ?? ? lf s ? ---------------------------------------------- - = (eq. 9)
isl9220, isl9220a 12 fn6936.3 february 16, 2012 copper attached to the exposed pad usually results in better thermal performance. the exposed pad is big enough for 5 vias as shown in figure 8. figure 8. exposed pad charging flow chart the charging flow chart is shown in figure 9 the charging starts with the trickle mode, the isl9220, isl9220a charges the battery in a trickle current. if v bat reaches v pchg2 before the trickle charge timeout interval, the operation will change to cc mode. when the output voltage reaches the 4.2v final voltage, the operation will change to cv mode, where the battery is charged at a constant voltage. if the end-of-charge current is reached before the timeout interval is elapsed, the operation will come to charge complete state. the charging is terminated. after the termination, if the output voltage drops below the recharge threshold, a recharge starts an d the timer is reset to zero. in the event that the timeout condition is reached before eoc, the fault mode is entered. the fault mode can also be triggered by a v bat ovp event. to exit the fault mode, the input power has to be removed and re-applied, or the en pin is toggled to hi and back to lo, then a new cycle starts.
isl9220, isl9220a 13 fn6936.3 february 16, 2012 yes vbat > vpchg1 ? no yes por temp ok ? no yes temp ok ? no yes vbat > vpchg2 ? no yes temp ok ? no yes bump start for battery in uv fault pre-charge vbat > vrechg ? ibat < i_eoc (> 25ms) ? yes no no yes vbat < vrechg (> 25ms) ? yes fast-charge no vin>vovp from any state suspend chgr = off stat1 = h stat2 = h reset safety timer reset safety timer chgr = off (full) chgr = on iset2 sets current for isl9220: resume timer if stopped for isl9220a: reset timer resume timer if stopped chgr = on (fast charge) chgr = on 50ma typ. (ldo mode) resume timer if stopped suspend chgr = off halt timer stat1 = h stat2 = h reset safety timer en = 0? batt connecetd ? yes no no timeout before eoc vbat > vout_ovp from any state fault chgr = off stat1 = h stat2 = l suspend chgr = off halt timer stat1 = h stat2 = h temp ok? yes no resume timer if stopped suspend chgr = off halt timer stat1 = h stat2 = h suspend chgr = off halt timer stat1 = h stat2 = h por or en toggled vpor isl9220, isl9220a 14 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn6936.3 february 16, 2012 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog signal processi ng functions. go to www.intersil.com/products for a complete list of intersil product families. for a complete listing of applications, rela ted documentation and related parts, please see the respective device information p age on intersil.com: isl9220, isl9220a to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at http://rel.intersil.com/reports/search.php revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change december 16, 2011 fn6936.3 moved the 10f capacitor at the sw to the vbat pin in ?1-cell application? and ?2-cell application? on page 6. october 3, 2011 added an1589 to ?related literature? on page 1. changed eval board names in ?ord ering information? on page 2 from isl9220eval1z, isl9220aeval1z to isl9220irtzeval1z, ISL9220AIRTZEVAL1Z. in the ?pin descriptions? on page 2: pin 12, vhi. changed "connect a schottky diode from vbia s to this pin, and a 0.1mf capacitor to agnd, as shown in the typical application circuits." to "connect the anod e of a schottky diode to vbias pin and the cathode to vhi pin. connect a 0.1f capacitor from vhi pin to sw pin. see ?typical application diagrams? on page 6. pin 17, vbias. changed "connect a 1f ceramic capacitor from this pin to agnd." to "connect a 0.1f ~ 4.7f ceramic capacitor from this pin to agnd. a typical 1f ceramic capacitor is recommended" august 11, 2010 fn6936.2 added ?number of cells? column to ?ordering information? on page 2. corrected input voltage in ?2-cell application? on page 6 from ?4.5v to 14v? to ?9v to 14v? july 1, 2010 fn6936.1 changed minimum limit for ?ipchg1? on page 4 from 30 to 25ma. on page 4, changed "minimum on-tim e" with typical 20ns to ?minimum duty cycle? with typical of 0%. changed minimum limit for ?vpchg1? on page 4 from 4.85 to 4.80v for only the "a option" changed maximum limit for ?vpchg1? on page 4 from 5.25 to 5.3v for only the "a option" changed minimum limit for ?vpchg2? on page 4 from 5.80v to 5.75v for only the "a option" changed maximum limit for ?vpchg2? on page 4 from 6.2v to 6.25v for only the "a option" changed minimum limit for ?vrechg? on page 4 from 7.80v to 7.75v for only the "a option" changed maximum limit for ?vrechg? on page 4 from 8.20 to 8.25v for only the "a option" june 30, 2010 fn6936.0 initial release.
isl9220, isl9220a 15 fn6936.3 february 16, 2012 package outline drawing l20.4x4e 20 lead thin quad flat no-lead plastic package rev 0, 4/10 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 id entifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view jedec reference drawing: mo-229. 7. 2 . 60 see detail "x" 0.23 +0.07/- 0.05 base plane pin #1 6 10 ( 2 . 60 ) ( 16x 0 . 50 ) ( 20x 0 . 23 ) ( 20 x 0 . 60 ) 0.75 0 . 2 ref 0 . 00 min. 0 . 05 max. c 5 4 0.10 c m index area (4x) 0.15 pin 1 6 4.00 15 4.00 11 a b 5 0.50 16x 16 4x 2.00 20 1 6 0.08 c c seating plane 0.10 c ab 0.10 20x 0 . 40 (3.8 typ) index area


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